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The Current Plan to Possibly be Augmented

TranSeed Labs is testing two PCI express artificial network acceleration products and their SDKs against easy to assemble data sets and demos.

  • Aaeon Up PER-TAIC-A10-0011 — chip: Intel Movidius Myriad 2 VPU — sdk: OpenVINO 2.0.2, OpenCV, MDK, Caffe
  • NVIDIA GeForce GTX 1060 — chip: GP106-400-A1 — sdk: CUDA 9.2

Initially, it is not a comparison test but a pair of POCs, however, the intended objective is to develop a single test suite and apply it to a number of emerging technologies to produce a comparative convergence speed and accuracy assessment. Some of the further acceleration test targets include these.

  • Via Tech 986-SOM-9X20 — chip: QualComm Snapdragon 820E SoC2 — sdk: ETK, AI Toolkit, Hexagon NN
  • Myriad X (only chip samples are available)
  • Nervana NNP-L1000 (expected in 2019)3

Unalterable Aspects of the Project

Please respect, in comments and answers, that we have no interest in the below three research directions at this time, for the reasons given. Others are free to pursue them. For this question, we ask that no time or text be wasted on feedback regarding these three architectural choices.

  • Ultimately, because of the focus of our other research, emphasis will be placed on testing real time control with reinforce-able or trained-state-alterable algorithms and approaches rather than batch training
  • PCIe interfaces will be selected over USB — USB is 3.0 too slow4
  • No cloud services will be researched. Contributing to the risk of a trend toward covert totalitarianism is against lab policy.
  • Low level programming (g++ -S) will be used for initial research rounds5.

Specific Questions

Testing of artificial network hardware acceleration — Any additions?

  • Does anyone know of any other competitively priced PCI express artificial network acceleration hardware that should be tested?

  • Does anyone have any thoughts about what test scenarios would be helpful to help determine the best course of action for their own research?

Please be practical and collaborative in your responses.

Footnotes

[1] The Aaeon Up board contains the Intel's Movidius Myriad 2 VPU, a DSP for computer vision, the same SoC (system on a chip) that the Intel Movidius Neural USB stick uses but the PCI express interface will likely be much faster. The

[2] The "A" in QualComm's model number 820A indicates it targets smart cars and may tolerate a wider storage temperature range and wider operating temperatures too.

[3] The Intel Nervana PCIe board will handle bfloat16 data type and is expected to model pulse based signal propagation in parallel concurrent (not time shared) architecture instead of loop iteration, thereby properly modelling something close to how brain neurons activate, unlike cell types used in MLPs and RNNs, which do not.

[4] USB 3.0 boasts 625 MB/s but generally tests at transfer speeds around 140 MB/s. The motherboards we use are PCIe v5 x16, providing 63 GB/s. Even if the daughter board provides only PCI3 v3 x16, those devices usually test around 15 GB/s. Also, Jim Panian, director of technical standards at Qualcomm Technologies stated clearly in 2015 that they intended to use the PCI express protocol for inter-SoC connectivity, so the protocol is a good one to invest research time into optimizing.

[5] Higher level programming provides simplicity and convenience, but in doing so hides too much for low level timing analysis. The layers that create the simplicity and convenience often obscure timing costs unrelated to the hardware under test.

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    $\begingroup$ You are asking a highly specific question..You should try SO, you'll get a broader audience there $\endgroup$ – DuttaA Aug 16 '18 at 11:36

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